Ideally, transistors should exhibit both high performance and low power consumption. Typically, however, the design and fabrication of transistors has required a tradeoff between these two parameters. In particular, in conventional processes, optimizing one of these parameters tends to adversely affect the other. For example, as transistor channel lengths are decreased to improve the speed of a device, thereby optimizing device performance, other characteristics, such as sub-threshold leakage, tend to become more difficult to control, thereby increasing the power consumption of the device.
There is thus a need in the art for a transistor, and a method for making the same, which overcomes this infirmity. In particular, there is a need in the art for a transistor, and a method for making the same, in which aspects of the device which affect performance characteristics can be optimized independently of those aspects which minimize power consumption. These and other needs are met by the devices and methodologies described herein.